Abstract
In the quest for higher power density in switching converters, the use of SiC MOSFETs provides increased switching speed, which allows higher switching frequencies and smaller filtering elements. In order to accurately estimate switching losses in these fast high-voltage devices, a detailed analytical loss model considering parasitic effects and parasitic elements is required. In this paper, a simple and accurate analytical loss model is presented which considers the device junction capacitances, parasitic inductances and reverse recovery of the high voltage SiC MOSFET body diode. The reverse recovery time is calculated and used in the model. The proposed model provides easy-to-use closed-form mathematical equations and gives insight into the switching process and the parameters that affect it. Analytical equations are validated by experimental results.
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