Accuracy of EVC Method for the PiN Diode Pattern on SiC Epi-Wafer

Abstract

In the previous report, we proposed the EVC (Expansion-Visualization-Contraction) method (Fig. 1) that effectively screens for malignant BPDs (basal plane dislocations) in the epi layer and near substrate interface, which expand to SSFs (Shockley-type stacking faults), leading to forward voltage degradation. The method intentionally utilizes the REDG (recombination enhanced dislocation glide) mechanism by UV (ultraviolet) irradiation in wafer sorting to replace the so-called burn-in (accelerated current stress) process, which is time-consuming during mass production. In this report, to verify the effectiveness of this method, we compared the SSFs expanded by forward biasing the PiN diode (Fig.3) on a wafer with the SSFs expanded by UV irradiating at the same PiN diode area where the metal electrode was removed by etching. The accuracy of the EVC method requires that SSFs expanded by forward biasing should be detected in the same positions as those of SSFs expanded by UV irradiation. Not all BPDs expand at the same time, but the number of expanded SSFs increases over time under constant forward current conditions. In this experiment, the current density was 400 A/cm2 for 8 minutes, and the excessive UV irradiation conditions was 143 W/cm2 for 20 minutes to avoid missing. Missing means the inability to check the SSFs expanded by forward biasing against the SSFs expanded by UV irradiation (Fig.2). For each diode electrode window, the presence or absence of SSFs were determined, and as shown in Table 2, 2 out of 49 window areas were missing, with the EVC method accuracy rate of 96 %.