Abstract

The Internal Configuration Access Port (ICAP) is the core component of any dynamic partial reconfigurable system implemented in Xilinx SRAM-based Field Programmable Gate Arrays (FPGAs). We developed a new high speed ICAP controller, named AC_ICAP, completely implemented in hardware. In addition to similar solutions to accelerate the management of partial bitstreams and frames, AC_ICAP also supports run-time reconfiguration of LUTs without requiring precomputed partial bitstreams. This last characteristic was possible by performing reverse engineering on the bitstream. Besides, we adapted this hardware-based solution to provide IP cores accessible from the MicroBlaze processor. To this end, the controller was extended and three versions were implemented to evaluate its performance when connected to Peripheral Local Bus (PLB), Fast Simplex Link (FSL), and AXI interfaces of the processor. In consequence, the controller can exploit the flexibility that the processor offers but taking advantage of the hardware speed-up. It was implemented in both Virtex-5 and Kintex7 FPGAs. Results of reconfiguration time showed that run-time reconfiguration of single LUTs in Virtex-5 devices was performed in less than 5 μs which implies a speed-up of more than 380x compared to the Xilinx XPS_HWICAP controller.

Highlights

  • Field Programmable Gate Array (FPGA) devices persist as fundamental components in the design and evaluation of electronic systems

  • By combining the XHwIcap SetClbBits function to write to a specific LUT with the XHwIcap DeviceReadFrame to analyze the programmed values on frames, we found that four frames are used to reconfigure a single LUT

  • We consider as primary reference comparing the Xilinx XPS HWICAP for Virtex5 and the AXI HWICAP for Kintex7 as these are, among the reported alternatives, the ones that support most of the Dynamic Partial Reconfiguration (DPR) tasks

Read more

Summary

Introduction

Field Programmable Gate Array (FPGA) devices persist as fundamental components in the design and evaluation of electronic systems. 7series family of Xilinx SRAM-based FPGAs are built on 28 nm, high-k metal gate process technology [2], Xilinx Virtex UltraScale+ uses 16 nm FinFET+, and Altera Stratix 10 devices are produced using Intel-14 nm Tri-Gate (FinFET) process technology [3]. This is one of the reasons that favor the increasing presence of such devices as programmable alternatives to ASICs. In addition, technical improvements in design and fabrication of FPGAs have produced more robust and flexible components embedding larger RAM memory blocks (BRAMs), DSP blocks, processors, and dedicated hardwired components. The inherent reconfigurable characteristics that FPGAs offer are among one of the most important advantages in the actual hardware implementation and redesign of systems

Objectives
Results
Conclusion
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call