A W-Band Low Noise Amplifier with High Gain and Low Noise Figure in 65-nm CMOS

Abstract

This paper presents a 94 GHz CMOS low-noise amplifier (LNA) with high gain and low noise figure (NF) for W-band frequency modulated continuous-wave (FMCW) radar applications. To reduce the NF and increase the gain, a differential transconductance enhanced (Gm-boosting) cascode structure based on transformer-coupled is proposed and applied in each stage. Furthermore, to increase the operating bandwidth and reduce the chip area, all the interstage matching is realized by the transformer. Using 65-nm CMOS technology, the proposed three-stage differential LNA realizes the peak gain of 26.2 dB and the minimum NF of 6.76 dB across 90-100 GHz. The chip area is only 0.28 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> including pads.