A VLSI‐oriented interconnection network having self‐similarity

Abstract

AbstractThis paper proposes a construction method for the large‐scale multiprocessor system, which is composed of a large number of processors and memories. There can be two configurations for the large‐scale multiprocessor systems. One is the configuration composed of the switching network among processors and memories, as is seen in the case of the omega network. The other is the processor network which is the graph composed of processors, with the processor being regarded as a node. The interconnection network proposed in this paper belongs to the latter category. It is a VLSI‐oriented interconnection network, where the multiprocessor system is implemented on a silicon wafer. The method of construction is developed from the viewpoint of factual geometry, where self‐similarity is considered among figures. The basic unit of the interconnection network is the structure composed of the processor, memory and bus. The system is constructed by recursively using the basic units. To compare the proposed system with other typical VLSI‐oriented interconnection networks, such as the tree and the snowflake interconnection networks, the maximum distance between processors, the mean distance between processors and the maximum message density, which is considered as the maximum communication load for the routing and node processors, are calculated.The result verifies the effectiveness of the proposed interconnection network.