Abstract
This paper presents the GIPSi processor array which is a programmable VLSI chip designed for local linear and non-linear image filtering algorithms. A first section introduces the GIPSi approach. Then the parallel SIMD architecture is described followed by a section about implemented algorithms. Special emphasis is laid on a rank order filter algorithm which has been adapted to the SIMD architecture. It follows a section concerning the VLSI implementation of the GIPSi system and some conclusions.
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