A virtual boundary model for a quick drop-impact analysis of PCB in electronic products

Abstract

Modeling and simulation of printed circuit boards (PCB) during drop test are often performed for electronic device assemblies. As sensitive components in electronic devices, components on the PCB are easily damaged during a drop-impact process. While different PCB positions in the electronic devices can cause different stress and strain on the board, these impact behaviors can also make a difference to the force along the solders that connect the chips to the PCB. Through an existing FEA software tool, we can find an optimal position of the PCB on the electronic device to improve product quality. To illustrate the proposed method, the drop simulation of a PCB specimen mounted on a packaged TV product was performed. Dynamic modeling and simulation of drop test was established and presented. The position of the PCB was optimized through the proposed virtual boundary method. With the method, three optimization models were considered, and the designs were proven to successful by comparing the stress and deflection of concerned points on the PCB. It is also found that the method can quickly determine several PCB optimal positions in electronic devices directly by the magnitudes of the deflection and stress.