A very area/power efficient mixed signal circuit for voice signal processing in 0.18 digital technology

Abstract

This paper presents a very compact and low power consumption mixed mode circuit for voice signal processing. A re-configurable ADC/DAC stage was implemented both in analog and digital blocks, taking advantage of the half-duplex operation and thus reducing the total area and consumption. The circuit was designed in a 0.18/spl mu/m digital CMOS process supplied at 1.8/3.3 V. The presented circuit and architectural design techniques reduce the area down to 0.42mm/sup 2/ and the power consumption to 0.94mA in D-to-A mode and 0.88mA in A-to-D mode, while featuring 8 Ohm speaker driving delivering 70mW and all the necessary microphone interface and bias including a 0 to 42 dB gain control. The measured THD is 0.015% and the dynamic range is 71.2dB in D-to-A mode, while A-to-D mode the THD is 0.004% and the dynamic range is 74dB.