Abstract
Abstract—Two design techniques are presented which allow one counter circuit to divide a fixed-reference frequency by a wide range of counts. In the examples used the output frequency is preselected on three 10-position selector switches, providing for division of the input reference frequency by N, where 1≤N≤999. The techniques described are not dependent on the type of digital logic used and are therefore applicable to any family of binary logic modules.
Published Version
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