Abstract
A silicon compilable macrocell implementing the IEEE S1149.1 Test Port has been developed and implemented to facilitate the use of the 1149.1 standard in application-specific integrated circuits (ASICs). The macrocell is intended as a drop-in block which supports the basic boundary-scan functions. Options are provided to support different possible user configurations (as supported by the 1149.1 standard) by merely recompiling the macrocell generator with a different set of user parameters.
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