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https://doi.org/10.1109/43.486670
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Cite Publication Date: Jan 1, 1996 | |
 Citations: 3 |
Affiliation: National Taiwan University
This paper reports a unified triode/saturation model with an improved continuity in the output conductance suitable for CAD of VLSI circuits using deep sub-0.1 /spl mu/m NMOS devices. As verified by the experimental data, the model shows an accurate prediction of the output conductance characteristics.
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