A two-dimensional simulation model for the molded underfill process in flip chip packaging

Abstract

The flip chip process involves the deposition of solder bumps on the chip surface and their subsequent direct attachment and connection to a substrate. Underfilling traditional flip chip packaging is typically performed following a two-step approach. The first step uses capillary force to fill the gap between the chip and the substrate, and the second step uses epoxy molding compound (EMC) to overmold the package. Unlike traditional flip chip packaging, the molded underfill (MUF) concept uses a single-step approach to simultaneously achieve both underfill and overmold. MUF is a simpler and faster process. In this study, a 2D numerical model is developed to simulate the front movement of EMC flow and the void formation for different geometric parameters. The 2D model simplifies the procedures of geometric modeling and reduces the modeling time for the MUF simulation. Experiments are conducted to verify the prediction results of the model. The effect on void formation for different geometric parameters is investigated using a 2D model.