Abstract
A switched-capacitor (SC) inductance simulation circuit that simulates floating inductance using only one unity gain buffer (UGB) and is controlled by a two-phase clock is described. It is based on the bilinear s-to-Z transformation. A comparison between this and an SC inductor proposed previously by the author (IEEE Int. Symp. on Circ. & Syst. p.2237-9, 1988) is discussed. Experimental results for a third-order low-pass filter using the proposed SC inductor are described. >
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