Abstract
This study investigates the triple-level cell (TLC) memory retention of a MoS2-channel based charge trap flash (CTF) device. A top-gated CTF device with a high-κ gate dielectric is found to have a high coupling ratio, which enhances the tunneling efficiency for programming. The fabricated devices show the long memory retention performance for each state, demonstrating the feasibility of a robust TLC CTF memory device based on a CVD grown 2D material.
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