A Trigger Inspection Platform for sTGC Detector Front-End Electronic Boards

Abstract

This paper presents an inspection platform used for inspecting the trigger function of the ATLAS small-strip Thin Gap Chamber (sTGC) detector front-end electronic boards (FEBs). There are two different types of FEBs, pad front-end board (pFEB) and strip front-end board (sFEB), and they are designed to read out different types of signals of the sTGC detector. After reading out signals from the sTGC detector, FEBs output events data and trigger data to the data processing system, and the trigger data are used for filtering events data. The trigger function is an important part of FEBs, to inspect the trigger function of each FEB comprehensively, we developed this inspection platform. For this platform, we designed a FEB Test Board (FTB) to communicate with FEBs and the host computer, and the trigger function check logic is embedded in the FPGA. The FTB connects with FEBs through mini-SAS cables and communicates with the host computer through the Gigabit Ethernet. The whole trigger function inspection process is controlled by the host computer, so it’s quite convenient to configure the working statuses of FEBs and record inspection results. During the inspection process, the FTB sends 640Mbps pad trigger signals to the sFEB and reads out 4.8Gbps trigger data from the pFEB and the sFEB. Then, the trigger data are processed in the FPGA, and the inspection results are sent to the host computer. The inspection platform can efficiently inspect the trigger function of one pFEB and one sFEB at the same time. The specific characteristics and implementations are described in detail.