Abstract
We propose an input protection scheme composed of thyristor devices only without using a clamp NMOS device in order to minimize the area consumed by a pad structure in CMOS RF ICs. For this purpose, we suggest low-voltage triggering thyristor protection device structures assuming usage of standard CMOS processes, and attempt an in-depth comparison study with a conventional thyristor protection scheme incorporating a clamp NMOS device. The comparison study mainly focuses on robustness against the HBM ESD in terms of peak voltages applied to gate oxides in an input buffer and lattice heating inside protection devices based on DC and mixed-mode transient analyses utilizing a 2-dimensional device simulator. We constructed an equivalent circuit for the input HBM test environment of the CMOS chip equipped with the input ESD protection devices. And by executing mixed-mode simulations including up to four protection devices and analyzing the results for five different test modes, we attempt a detailed analysis on the problems which can occur in real HBM tests. We figure out strength of the proposed thyristor-only protection scheme, and suggest guidelines relating the design of the protection devices and circuits.
Highlights
CMOS chips are vulnerable to electrostatic discharge (ESD) due to thin gate oxides used, and protection devices such as NMOS transistors are required at input pads
We propose an input protection scheme composed of thyristor devices only without using a clamp NMOS device in order to minimize the area consumed by a pad structure in CMOS RF ICs
The comparison study mainly focuses on robustness against the human-body model (HBM) ESD in terms of peak voltages applied to gate oxides in an input buffer and lattice heating inside protection devices based on DC and mixed-mode transient analyses utilizing a 2-dimensional device simulator
Summary
CMOS chips are vulnerable to electrostatic discharge (ESD) due to thin gate oxides used, and protection devices such as NMOS transistors are required at input pads. We suggest an input protection scheme utilizing low-voltage triggering thyristor devices only without using a clamp NMOS device in input pad structure. This scheme can be implemented into input pad structures of CMOS RF ICs to provide protection against HBM and MM (Machine mode) discharge events. Based on the simulation results, we figure out weak modes in real discharge tests, and present indepth analysis results relating critical characteristics such as peak voltages developed across gate oxides in input buffers, locations of peak temperature inside protection devices, and so on.
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