Abstract

Stress distributions in the Si channel regions of silicon–carbon source/drain and stressed silicon nitride liner NMOSFETs were studied using the 3D ANSYS simulations. The mobility enhancement was found to be dominated by the tensile stress along the transport direction and compressive stress along the growth direction in wide devices. Stress along the width direction was found to have the least effect on the drain current in wide samples. Stress along the width slightly degraded the mobility gain in the narrow width regime. The compressive stress along the vertical direction, perpendicular to the gate oxide, contributes significantly to mobility enhancement and cannot be neglected in nanoscale NMOSFETs. The impact of width on performance improvements such as mobility gain was also analyzed using TCAD simulations.

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