Abstract
This paper proposes an alternate switched-capacitor amplifier capable of handling rail-to-rail input common-mode voltage without using a rail-to-rail op-amp. Unlike most existing switched-capacitor architectures, the proposed alternate architecture holds the op-amp input terminals at a fixed voltage level in both the sample and hold phases irrespective of the input signal common-mode voltage. Designed and simulated in AMS 0.35um CMOS process, the implemented architecture, operating on 5V, can handle inputs with common-mode voltage varying from 0.1V to 4.9V while maintaining the op-amp common-mode voltage at 2.5V. Therefore, this architecture significantly relaxes the op-amp design and achieves more than 16-bit linearity over the rail-to-rail input common-mode voltage range.
Published Version
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