A Survey on VLSI Implementation of AES Algorithm with Dynamic S-Box

Abstract

In recent research, very large-scale integration (VLSI) design and its implementation plays a major role. It has been considered as compact and contains additional techniques. However, it undergoes security threats like differential power analysis (DPA) attacks, confidential information leakage, suspicious data insertion, brute force attacks, and other severe attacks. Hence, the cryptographic techniques that have been implemented to enhance the security level for VLSI devices is the focus of this survey. The symmetric cryptographic technique of advanced encryption standard (AES) is considered suitable for this security enhancement and it is an advanced encryption process, and so the intelligible data are transmitted in an unintelligible form to confuse the attackers and the data is securely transmitted without any interruption. Different techniques to implement the AES approaches in VLSI devices are analyzed. The dynamic S-box technique is also analyzed for key-dependent processes. The key-dependent S-box of block ciphers is more secure than a general fixed S-box. The strength of the cipher is increased by the usage of an S-box. A dynamic S-box, generated to be key-dependent and with a discrete logarithmic approach, enhanced the S-box nonlinearity. Several measures analyzed regarding security and complexity of nonlinear transformation of S-box improved. Hence, the AES algorithm with dynamic S-box makes the system dynamic, more nonlinear, and with an unbreakable architecture. In this review, it also identified that to implement nonlinear transformation in AES, an S-box component has been used. This survey has been provided as guidelines for VLSI architecture implementation in a more secure way with cryptographic algorithm of AES and a dynamic S-box.