A survey on fault tolerance in FPGAs

Abstract

An FPGA (Field Programmable Gate Array) is a device that contains a matrix of reconfigurable gate array logic circuitry. During FPGA configuration, the internal circuitry is connected in a way that creates a hardware implementation of the software application. Unlike CPUs, FPGAs use dedicated hardware for processing logic and do not have an operating system. They are truly parallel in nature so different processing operations do not have to compete for the same resources. So the advantage is that the performance of one part of the application does not affect when additional processing is added. Another advantage is that multiple control loops can run on a single FPGA device at different rates. FPGA-based control systems can enforce critical interlock logic and also be designed to prevent I/O forcing by an operator. However, unlike hard-wired printed circuit board (PCB) designs which have fixed hardware resources, FPGA-based systems can literally rewire their internal circuitry which allows reconfiguration after the control system is deployed to the field. Faults are very common in VLSI systems such as FPGA. Different fault-tolerance techniques are being developed to increase the reliability and dependability of applications on FPGAs. The goals of fault-tolerance techniques are to minimize the hardware, timing, and power overhead, and maximize the reliability of the system. This paper provides a survey on fault tolerance in FPGA based systems.