Abstract

This paper presents a low-phase-noise LC voltage-controlled oscillator (LC-VCO) with top resistive biasing in subthreshold region. The subthreshold LC-VCO has low-power and low-phase-noise due to its high transconductance efficiency and low gate bias condition. The top resistive biasing has more benefit with the feature of phase noise than MOS current source since it can support the low-noise characteristics and large output swing. The LC-VCO designed in 130-nm CMOS process with 0.7-V supply voltage achieves phase noise of -116 dBc/Hz at 200 kHz offset with tuning range of 398 MHz to 408 MHz covering medical implant communication service (MICS) band.

Highlights

  • Integrated LC oscillators are important building blocks in the implementation of radio frequency (RF) front-end modules to provide a stable local oscillator (LO) signal for modulation/demodulation or up/down frequency conversion

  • The medical implant communication service (MICS) band in the frequency range of 402 MHz to 405 MHz is widely used for medical RF transceivers because the MICS band signals have reasonable propagation characteristics in human body and are well suited for achieving a good trade-off between size

  • This paper presents the analysis of phase noise performance through various biasing techniques, and a lowphase-noise LC voltage-controlled oscillator (LC-voltage-controlled oscillators (VCOs)) is designed using resistive biasing instead of active current source scheme

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Summary

Introduction

Integrated LC oscillators are important building blocks in the implementation of radio frequency (RF) front-end modules to provide a stable local oscillator (LO) signal for modulation/demodulation or up/down frequency conversion. (2015) A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing. One of the major challenges in the design of RF front-end modules is implementation of fully integrated lowpower, low-phase-noise voltage-controlled oscillators (VCOs). The subthreshold-biased LC-VCO and resistive biasing technique are employed to achieve low-voltage operation and low phase noise. This paper presents the analysis of phase noise performance through various biasing techniques, and a lowphase-noise LC-VCO is designed using resistive biasing instead of active current source scheme. The top resistive biasing is employed for low-phase-noise and low-voltage operation because of its inherent advantage of low effective noise and large voltage swing. This circuit has been designed in 130-nm CMOS technology with 0.7-V supply voltage.

Phase Noise Analysis of Biasing Techniques
Effective Noise
Oscillation Amplitude
Circuit Design and Simulation Results
Findings
Conclusion
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