A sub-1V dual-path noise and distortion canceling CMOS LNA for low power wireless applications

Abstract

This paper presents a 0.8 ​V supply voltage low noise amplifier (LNA) with high linearity for low power wireless applications. To reduce both second- and third-order intermodulation components (IM2 and IM3), the proposed structure creates equal common-mode (CM) currents with the opposite sign by cascading two differential pairs with a cross-connected output and improves linearity. Using resistive feedback together with noise and distortion canceling technique mutually cancel noise and nonlinearity of both main and auxiliary amplifiers. Combining transformer-based gm-boosting and current reuse techniques makes the presented LNA a superior candidate for low power radios. Detailed analysis and simulations are provided to show the effectiveness of the proposed LNA structure. Simulation results using 65 ​nm CMOS process reveal that the linearized low power LNA achieves over 25 ​dB voltage gain, 2.7 ​dB NF, +10.1 dBm IIP3, and average IIP2 of more than +57 dBm while consuming 870 ​μW.