A Sub-1 V Temperature-Insensitive-PSR Bandgap Reference with Complementary Loop Locking

Abstract

This paper presents a novel low-voltage bandgap reference with improved power supply rejection (PSR). The proposed circuit adopts a complementary loop locking approach for stabilizing the drain-source voltages of the current mirrors, which gives rise to a boost of the PSR performance by more than 30[Formula: see text]dB over [Formula: see text]–110∘C and at 1-V supply. An analysis shows that the PSR of the proposed bandgap reference is typically characterized with its insensitivity to temperature variations. The circuit is designed with a commercial 0.18-[Formula: see text]m CMOS process. The experiment results of Monte Carlo simulation demonstrate that the average PSR with 1-V supply is [Formula: see text][Formula: see text]dB at DC and is [Formula: see text][Formula: see text]dB at 1[Formula: see text]kHz (attained under a room temperature condition of 27∘C). And the temperature coefficient of the DC-based PSR is about 0.83%/∘C at 1-V supply, significantly decreased by three–six folds compared to other conventional designs. The quiescent current consumed is only about 13.5[Formula: see text][Formula: see text]A.