A Sub-1-V, 350-$\mu$ W, 6.5-dB Integrated NF Low-IF Receiver Front-End for IoT in 28-nm CMOS

Abstract

This letter presents a highly efficient low-intermediate frequency receiver front-end for Internet-of-Things applications. The low-noise trans-impedance amplifier (LNTA) combines a transformer-based network for scaling up the source impedance together with passive gm -boosting and current-reuse techniques to achieve better noise and $12\times $ current saving compared with a common-gate (CG) stage. A complex channel-selection filter with center frequency and passband of 2 and 1.4 MHz, respectively, is implemented after the passive mixer with a gm -boosted CG stage. Built in 28-nm CMOS, the proposed receiver occupies an active area of 0.1 mm2, it is supplied with 0.9 V and consumes only 350 $\mu \text{W}$ , while showing a minimum NF of 6.2 dB at the channel of interest. The RF performance of the proposed receiver is very competitive with the state-of-the-art ultralow-power receivers, while it consumes the lowest power.