A Study on Making a Stable Loop Profile and Improving Bonding Time in Wire Bonding Process

Abstract

Wire bonding is one of the most important processes in assembly of semiconductor. And the most competitive technology in wire bonding is making advanced loop profile. Therefore, as the growth of high-density and high-stacked die packages, it is essential to develop a highly lowed loop profile because wire bonding process is so sensitive in the semiconductor trend. Making a lowed loop profile is a key technology for today’s wire bonders. However, the conventional Folded Loop (FL) profile always accompanies many problems, such as critical faults due to un-stability at the neck of wire loop and long bonding time due to a lot of folding steps. These kinds of problems cause much of the un-efficient operation in the wire bonding. Therefore, we should develop an advanced loop profile to meet using more stable loop profile and applying speedy bonding time. The usual folded type loop profile can be developed by improving the shape of wire neck formation and reducing the kink steps for making lowed neck formation. In this paper, we propose a Very-Very Lowed Loop (VVLL) profile and it is the improved method to realize a fast and reliable loop profile in wire bonding process.Fig.1 shows that the result of the conventional FL profile and its 6-folding steps.Fig.2 describes 4-folding steps of the proposed VVLL profile and the bonding results.Fig.3 includes the critical problems of FL profile appeared at the loop neck position. Cracks are caused by 6-folding steps and direct touching of a capillary tool. In addition, the loop variation is also happened due to bouncing effects while realizing loop trajectory.Fig.4 depicts the advantages of VVLL. By decreasing the number of bending steps, it is possible to deconcentrate the stress and to reduce variation in the neck position of wire loop. Fig5 is shown how the one cycle bonding time is speedy by converting the folding method from FL to VVLL. It can reduce 2-steps of folding motion.To sum up, VVLL profile is significantly efficient to realize a fairly lowed and stable loop profile for state of the art high-tech semiconductor. REFERENCE Harman, George G. Wire bonding in microelectronics. McGraw-Hill, 2010 Brunner, Jon, Ivy Wei Qin, and Bob Chylak. "Advanced wire bond looping technology for emerging packages." Electronics Manufacturing Technology Symposium, 2004. Wang, Fuliang, Yun Chen, and Lei Han. "Modeling and experimental study of the kink formation process in wire bonding." Semiconductor Manufacturing, IEEE Transactions on 27.1 (2014): 51-59. Figure 1