A Study on Column-Parallel ADCs Using DMOS Capacitors for CMOS Image Sensors

Abstract

Several integrated capacitors can be used in analog-to-digital converters (ADCs) for complementary-metal-oxide-semiconductor (CMOS) image sensors, including metal-insulator-metal (MIM), metal-oxide-metal (MOM) and metal-oxide-semiconductor (MOS) capacitors. Among those capacitors, MOS capacitors have the highest capacitance density per unit area but a large voltage dependency, which will cause the non-linearity of ADCs. Recently, several types of ADCs are employed for column-parallel ADCs, including a single-slope (SS), sigma-delta (ΔΣ), successive approximation (SAR) ADC, cyclic ADC and folding-integration/cyclic (FI-Cyclic) ADCs. A Cyclic ADC is well known for its ability to achieve medium resolution while requiring a small silicon area and implementing a reasonable conversion rate of one conversion cycle per bit of resolution. Compared with other ADCs, the cyclic ADC has superiority in overcoming the difficulty of compatibility between ADC speed and bit resolution, while maintaining low-noise and HDR. On the basis of inheriting the advantage of cyclic ADC, FI-Cyclic ADC has better performance on low noise, high grayscale resolution and resulting high dynamic range.