Abstract
The endurance of Si nanocrystal memory devices under Fowler–Nordheimprogram and erase (P/E) cycling is investigated. Both threshold voltage (Vth) and subthreshold swing (SS) degradation are observed when using a high programor erase voltage. The change of SS is found to be proportional to the shift ofVth, indicating that the generation of interface traps plays a dominant role. The chargepumping and the mid-gap voltage methods have been used to analyze endurancedegradation both qualitatively and quantitatively. It is concluded that high erase voltagecauses severe threshold voltage degradation by generating more interface traps and trappedoxide charges.
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