A straightforward and CMOS-compatible nanofabrication technique of periodic SiO2 nanohole arrays

Abstract

In this work, we have demonstrated a straightforward and CMOS-compatible nanofabrication technique that can produce well-ordered periodic SiO2 nanohole arrays in wafer-scale using a single amorphous silicon (α-Si) layer. It is the first time that α-Si material has been used as an etch mask to fabricate SiO2 nanostructures. Our results have shown that the diameter and shape of SiO2 nanohole arrays, with vertical and smooth sidewalls, can be precisely controlled by an optimized two-step etch process. The diameter and pitch of nanoholes as small as 45 nm and 140 nm, respectively, have been successfully achieved. Moreover, the technique is independent of any specific lithographic approaches and, therefore, is capable of fabricating SiO2 nanohole arrays with smaller diameters and higher densities. Furthermore, since our approach is completely metal-free, it can be incorporated and integrated very easily into the standard semiconductor industry. It has a potential for wide applications in micro-nanofabrication, and represents a big step towards mass production.