A Steady-State LDMOST Model Based on Semi-Numerical Regional Approach

Abstract

This paper presents a high-voltage lateral DMOS transistor (LDMOST) model for steady-state condition.The device modelling method is basically based on a semi-numerical regional approach.The complete model is physical, so that it accounts for unique LDMOST features such as non-uniform channel doping, non-planar drift region and space-charge-limited current flowing.Themodelcalculationsshow good overall agreement withthe measured results.This DMOS transistor model, whichcan beapplicable to a SPICE-like circuit simulator, might be useful in technology CAD of high-voltage power ICs.