A standard and harmonic blocker tolerant receiver front-end using a harmonic rejection differential N-path notch filter and blocks withstand to possible variations

Abstract

Harmonic rejection differential N-path notch filter has been used as a miller passive filter along with low noise amplifier in this paper. By using it, both the standard and harmonic blockers are rejected at the RF input node and after the antenna. The noise figure of the front-end at the presence of standard and harmonic blockers (0 dBm) is less than 10 dB inside the whole RF bandwidth of front-end. The total power consumption, conversion gain and harmonic rejection are less than 33.15 (mW), and more than 66.5 and 80 (dB) over the RF bandwidth, respectively. Moreover, the proposed architecture is robust to the temperature and power supply variations such that the NF is less than 4.3 and 3.97 (dB) over the temperature and power supply changes, respectively. The proposed structure has been analyzed and simulated at the schematic level using CMOS 90 nm technology with a 1.5 V voltage supply.