Abstract

In this paper, a novel design of spread-spectrum clock generator (SSCG) with a third-order error-feedback delta-sigma modulator is presented. The proposed SSCG with triangular modulation can generate clocks with center spread ratios of 0.25, 1, 1.75, 2.5, 3.5, 5% and down spread ratios of 0.5, 2, 3.5, 5, 7, 10% over a wide frequency range from 20 to 700 MHz. The SSCG is implemented on a chip using SMIC 0.13 um CMOS process. Our tests show that 11.31 dB attenuation of the EMI at 80 MHz with down spread ratio of 10% and 12.98 dB attenuation at 133.3 MHz with center spread ratio of 5% can be achieved which is in agreement with the theoretic calculation.

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