A Low-Power Clock Generator with a Wide Frequency Tuning Range and Low Temperature Variation: Analysis and Design

Abstract

This paper presents a quadrature-clock generator based on a novel low-power ring oscillator with a wide frequency tuning range and low temperature variations. The proposed ring oscillator consists of two differential delay cells with a new controllable capacitive load of an MOS transistor. The wide tuning range is achieved due to transistor utilization in different regions and considering its resistance not to narrow down the frequency range. Delay cells are biased with a minimum possible value of a proportion to absolute temperature current to decrease frequency variations to temperature while the power consumption is kept low. The validation of the proposed methods is proved by circuit analysis. Post-layout simulation results of the proposed clock generator in 180[Formula: see text]nm CMOS technology are also presented. It exhibits a wide tuning range of 807 MHz to 2.66 GHz. The phase noise of the output signal is about [Formula: see text][Formula: see text]dBc/Hz at 10[Formula: see text]MHz offset frequency. Frequency changes less than [Formula: see text] in the temperature range of [Formula: see text]C–[Formula: see text]C. The clock generator consumes 0.657[Formula: see text]mW of power. Results show improvement in comparison to the previous works.