A source coupled FET logic—A new current-mode approach to GaAs logics

Abstract

This paper describes the basic properties of the source coupled FET logic (SCFL) in terms of the dc characteristics, the speed and power performance, and other inherent features. Simulation results are compared to those for the direct coupled FET logic (DCFL), demonstrating that the SCFL has a wide allowable threshold voltage range, an excellent fan-out capability, a small input capacitance, a high input sensitivity, and a versatility for the application.