A Soft-Error Mitigation Approach Using Pulse Quenching Enhancement at Detailed Placement for Combinational Circuits

Abstract

As technology continuously shrinks, radiation-induced soft errors have become a great threat to the circuit reliability. Among all the causes, Single-Event-Transient (SET) is the dominating one for the radiation-induced soft errors. SET-induced soft errors can be mitigated by multiple methods. In terms of area and power overhead, blocking SET propagation is considered to be the most efficient way for soft error reduction. It is found that the SET pulse width can be shrunk by pulse quenching effect, which can be utilized to mitigate soft errors without introducing any area and power overhead. In this paper, we present an effective detailed placer to exploit pulse quenching effect for soft error reduction in combinational circuits. In our method, the quenching effect enhancement is globally optimized while the cell displacement is minimized. The experimental results demonstrate that our method reduces the soft error vulnerability of the circuits by \(29.53\% \) vs. \(18.38\% \) of the state-of-the-art solution. Meanwhile, our method has a minimal effect on the displacement and half-perimeter wire-length (HPWL) compared to the previous solutions, which means a minimum timing influence to the original design.