Abstract

Silicon direct bonding (SDB) has been used to produce silicon-on-insulator (SOI) substrates for dielectrically isolated power devices. The up-drain VDMOS transistors give a low specific on-resistance and allow multiple isolated outputs. The CMOS devices have down to 2 μm drawn channel lengths, here used in a channelless sea of gates semicustom array. The vertical NPN and lateral PNP transistors show characteristics comparable to those of a 60 V bipolar process and make advanced analogue functions possible. The presented process allows fabrication of a 2 A half-bridge circuit with integrated drivers and logic functions.

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