Abstract
The authors describe a simple, high performance thin-film silicon-on-insulator (TFSOI) complementary BiCMOS (C-BiCMOS) technology, which can be used in low power wireless communication applications. In this technology, a novel, high performance lateral BJT structure is implemented using a gate spacer to obtain a thin base width and a minimum base linkage to the external base for minimized base resistance. A lateral NPN transistor (with maximum oscillation frequency (f/sub max/) of 29 GHz, cut-off frequency (f/sub T/) of 8 GHz, current gain (h/sub FE/) of 78, and collect-emitter breakdown voltage with base open (BV/sub CEO/) of 5 V), a lateral PNP transistor (h/sub FE/ of 51 and BV/sub CEO/ of 4.5 V), and NMOS and PMOS transistors (0.5 /spl mu/m channel length and 5 /spl mu/m channel width, 0.5/-0.8 V threshold voltage) am fabricated. This technology provides very promising low power, low cost, and high performance solutions for RF mixed-signal system-on-a-chip (SoC) applications.
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