A scaled 0.25- mu m bipolar technology using full e-beam lithography

Abstract

The full leverage offered by electron-beam lithography has been exploited in a scaled 0.25- mu m double polysilicon bipolar technology. Devices and circuits were fabricated using e-beam lithography for all mask levels with level-to-level overlays tighter than 0.06 mu m. Ion implantation was used to form a sub-100-nm intrinsic base profile, and a novel in-situ doped polysilicon emitter process was used to minimize narrow emitter effects. Transistors with 0.25- mu m emitter width have current gains above 80 and cutoff frequencies as high as 40 GHz. A record ECL gate delay of 20.8 ps at 4.82 mW has been measured together with a minimum power-delay product of 47 fJ (42.1 ps at 1.12 mW). These results demonstrate the feasibility and resultant performance leverage of aggressive scaling of conventional bipolar technologies. >