Abstract

High-radix routers that switch and route packets across large-scale racks become increasingly important and can crucially determine the latency and bandwidth of the interconnection network for super-computers and data centers. With the omnipresence of big data analysis there is a pressing need for scalable and self-diagnosing routers to construct more high-performance and reliable interconnect networks. This paper proposes an optimized aggregated-tile router micro-architecture with the reconfigurable multi-level routing and intelligent adaptive routing schemes to reduce the hardware requirement and optimize the router performance. The experiment results show that our approach achieves 98% throughput and maintains the same delay performance even better than YARC router while providing up to 40–50% reduction in memory consumption as well as global wire complexity. Moreover, by aggregating a built-in CPU and the intellectual network management structure, our router runs heuristic search algorithms to automatically reconstruct route tables for failure links or routers without any intervention of control plane, thereby implementing the automatical fault-tolerance and fault-recovery effects when maximizing the network performance.

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