Abstract
In this era of nanometer semiconductor nodes, the transistor scaling and voltage scaling are not any longer in line with each other, leading to the failure of the Dennard scaling. Thus, it poses a severe design challenge. Reversible computing plays a vital role in applications like low power CMOS, nanotechnology, quantum computing, optical computing, digital signal processing, cryptography, computer graphics andmany more. The primary reasons for designing reversible logic are diminishing the quantum cost, profundity of the circuits and the garbage outputs. It is impossible to determine the quantum computing without implementing the reversible computation. This paper will represent the literature survey based on several papers on combinational circuits using reversible computing and also the future scope is to be discussed.
Highlights
By Moore’s Law, the number of transistors will be doubled for every eighteen months
In 1980, Toffoli[7] stated that utilizing invertible logic gates, it is feasible to create a sequential PC with zero internal power dispersal preferably
The authors did a look up table for the delay calculation of the Conventional ripple carry adder and reversible ripple carry adder using Peres and HNG gates including gate count, garbage output and Quantum cost
Summary
By Moore’s Law, the number of transistors will be doubled for every eighteen months. For every eighteen months, it is possible to create higher performance general purpose processors. Fig. shows functional block diagram of 2X2 Feynmann gate. Fig. shows functional block diagram of 3X3 Double Feynmann gate. To implement the combinational circuits, the following functional block diagrams of some basic reversible gates like Not, Toffoli, Feynmann, Double Feynmann, Peres, Fredkin, HNG, TSG, DKG, NFT, RMUX1, TKS, BVF and TR are shown below. Fig. shows functional block diagram of 3X3 Toffoli gate.
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