Abstract

The shallow trench isolation (STI) is one of the key technologies for VLSI. The threshold voltage V th for surface-channel STI MOSFET's becomes lower with decreasing channel width W, which is called the inverse narrow-channel effect (INCE). Also, there is a hump in the subthreshold characteristic. On the contrary, buried-channel STI MOSFET's reveal a conventional narrow-channel effect. Also, there is no hump in the subthreshold characteristic. This paper reviews above phenomena with a consistent explanation for the surface- and buried-channel STI MOSFET's. Countermeasures for INCE are also discussed.

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