A Review of Failure Analysis Methods for Advanced 3D Microelectronic Packages

Abstract

Advanced three dimensional (3D) packaging is a key enabler in driving form factor reduction, performance benefits, and package cost reduction, especially in the fast paced mobility and ultraportable consumer electronics segments. The high level of functional integration and the complex package architecture pose a significant challenge for conventional fault isolation (FI) and failure analysis (FA) methods. Innovative FI/FA tools and techniques are required to tackle the technical and throughput challenges. In this paper, the applications of FI and FA techniques such as Electro Optic Terahertz Pulse Reflectometry, 3D x-ray computed tomography, lock-in thermography, and novel physical sample preparation methods to 3D packages with package on package and stacked die with through silicon via configurations are reviewed, along with the key FI and FA challenges.