Abstract

3D Package technology integrates multiple functional components into one device to achieve technology integration and faster time-to-market. It has become a product differentiator to be competitive in the market place by delivering better performance with smaller footprint at a cost-effective way. As more components are stacked together and planar features decrease at the same time, 3D package technology brings many new challenges for electrical fault isolation and failure analysis. First of all, each input-output net or channel needs to go through multiple components including substrate, interposer, layers of dices and interconnects in-between them. This leads to very long trace with complicated routing. Secondly, defect localization accuracy has become increasingly challenging because the defect is now deeply buried inside the package, and it becomes more difficult for the conventional fault isolation tools to see them. Adding to these technical challenges are the ever demanding volume and through-put time requirements. These challenges require more capable fault isolation tools and techniques with better accuracy, resolution and sensitivity. Time-Domain Reflectometry (TDR) and Lock-in thermography (LIT) are two powerful, non-contact and non-destructive techniques that have been successfully applied for electrical fault isolation of 2D packages. Yet they had limited success in 3D packages particularly for dead open and shorts deeply buried inside. This paper discusses the fundamental challenges of these methods with respect to their application to 3D packages, and introduces for the first time a new method based on Time Domain Transmissometry (TDT) to address these challenges effectively. It discusses the fundamentals and advantages of TDT, and presents various methods to improve its accuracy and efficiency as demonstrated by successful case studies.

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