A Reverse Engineering-Based Framework Assisting Hardware Trojan Detection for Encrypted IPs

Abstract

Most Intellectual Property (IP) cores in Field Programmable Gate Array (FPGA) designs are from untrusted third-party IPs (3PIPs) vendors, who may insert hardware trojans into them maliciously. Existing techniques for detecting trojans in 3PIPs mainly focus on unencrypted IP cores. Nevertheless, more and more IP designs are encrypted to protect their details from unauthorized access. In this paper, we propose a new method to crack encrypted IP cores in FPGAs by using reverse engineering techniques for assisting hardware trojan detection, and we optimize the reversing process to enhance its efficiency. To evaluate the performance of our method, we perform two experiments on Xilinx official encrypted IP cores. From the experimental results, we can find that our method can accurately crack various encrypted IP cores. Besides, the time consumption of optimized method is linear to the scale of target IP design, and has diminished 99% compared to the time cost of non-optimized method.