A research and implementation of digital technologies of natural sampling SPWM for three-level NPC inverter based on FPGA technology

Abstract

With the application of digital sinusoidal pulse width modulation (SPWM) control technologies, we can improve the output accuracy of the pulse width control signal, shorten the control respond time, and reduce the harmonic content of the output waveform. In this paper the digital theory of natural sampling SPWM is study with the combination of characteristics of high voltage and high power three-level NPC inverter. A framework of full digital natural sampling SPWM is set up. The digital realization method of triangular carrier wave and sinusoidal modulation wave generation, switching states combination and dead time configuration are studied in detail. And there comes up with a FPGA based hyper-real-time duty cycle calculation method, by using this method the Taylor series expansion and convergence judgment could be avoid. The output waveform can be achieved through the effect of natural sampling, compared with regular sampling, which is less harmonics in output waveform. At the end of this paper, the theory research has been realized by using VHDL language and a FPGA chip. The software simulation and experiment results prove the correctness and the feasibility of the digitization theory.