Abstract
A refined phase estimation based parallel carrier recovery algorithm for high speed wireless communication systems is proposed in this paper. This parallel algorithm is based on a serial DPLL (digital phase locked loop) carrier recovery feedback architecture and a novel refined phase estimation module. To archive high speed communication, parallelization of serial DPLL carrier recovery algorithm is presented; to guarantee high accuracy, a refined phase estimation design is proposed. A 32 parallel baseband simulation model of 16QAM modulation is performed on MATLAB platform to validate the proposed algorithm. Simulation results demonstrate that the performance loss of EVM (Error Vector Magnitude) introduced by the proposed algorithm is less than 0.3%, which is only half of the traditional coarse compensation algorithm.
Published Version
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