Abstract
A background calibration algorithm is proposed for comparator offsets and thresholds, and for DAC gains. It leverages redundancy in a 2-step ADC to detect errors without the need for additional analog blocks. The algorithm considers an error to have occurred when the fine phase outputs a result within its redundant range. The detected errors are classified into possible erroneous comparisons, and the source of the error is estimated by analyzing the error occurrence pattern. It has been implemented off-chip for a 4× time-interleaved Ping-Pong SAR ADC, which demonstrates the tolerance for ±8% VDD variation and convergence within 180k samples after a sudden 5% VDD drop.
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More From: IEEE Transactions on Circuits and Systems II: Express Briefs
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