Abstract
A run-time reconfigurable field programmable gate array (FPGA) system is presented for the implementation of the parallel independent component analysis (ICA) algorithm. In this work, we investigate design challenges caused by the capacity constraints of single FPGA. Using the reconfigurability of FPGA, we show how to manipulate the FPGA-based system and execute processes for the parallel ICA (pICA) algorithm. During the implementation procedure, pICA is first partitioned into three temporally independent function blocks, each of which is synthesized by using several ICA-related reconfigurable components (RCs) that are developed for reuse and retargeting purposes. All blocks are then integrated into a design and development environment for performing tasks such as FPGA optimization, placement, and routing. With partitioning and reconfiguration, the proposed reconfigurable FPGA system overcomes the capacity constraints for the pICA implementation on embedded systems. We demonstrate the effectiveness of this implementation on real images with large throughput for dimensionality reduction in hyperspectral image (HSI) analysis.
Highlights
In recent years, independent component analysis (ICA) has played an important role in a variety of signal and image processing applications such as blind source separation (BSS) [1], recognition [2], and hyperspectral image (HSI) analysis [3]
We presented a run-time reconfigurable field programmable gate array (FPGA) system implementation for the parallel ICA (pICA) algorithm to compensate for the performance limit of single FPGA
The implementation included the development of three reconfigurable components (RCs) based on the principal processes of the FastICA algorithm and the application of dimensionality reduction in HSI analysis
Summary
Electrical and Computer Engineering Department, The University of Tennessee, Knoxville, TN 37996-2100, USA. A run-time reconfigurable field programmable gate array (FPGA) system is presented for the implementation of the parallel independent component analysis (ICA) algorithm. We investigate design challenges caused by the capacity constraints of single FPGA. Using the reconfigurability of FPGA, we show how to manipulate the FPGA-based system and execute processes for the parallel ICA (pICA) algorithm. PICA is first partitioned into three temporally independent function blocks, each of which is synthesized by using several ICA-related reconfigurable components (RCs) that are developed for reuse and retargeting purposes. All blocks are integrated into a design and development environment for performing tasks such as FPGA optimization, placement, and routing. The proposed reconfigurable FPGA system overcomes the capacity constraints for the pICA implementation on embedded systems. We demonstrate the effectiveness of this implementation on real images with large throughput for dimensionality reduction in hyperspectral image (HSI) analysis
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