Abstract

SummaryFlicker noise and white noise from the charge pump (CP) within a phase locked loop (PLL) are key contributors to the close‐in phase noise floor of a fractional‐N frequency synthesizer. The pulse train from the phase frequency detector imposes different types of random pulse modulation on the up and down current sources, which causes different modulation effects to the flicker and white noises at low frequency. This paper rigorously analyzes the underlying noise random modulation mechanisms for the system operating in integer‐N and fractional‐N modes. Transient noise simulation using Verilog‐A behavioral modeling followed by power spectrum analysis is applied to support the mathematical analysis of the random noise modulation.

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