A Radiation Hardened SRAM in 180-nm RHBD Technology

Abstract

A 24 kB radiation hardened static random access memory using 180-nm commercial CMOS process appropriate for embedded system on a chip integrated circuits is presented. Radiation-hardened design is realized in the system, circuit and layout design to improve tolerance of radiation effects. The proto chips of SRAM are fabricated and tested, not only the electrical properties of SRAM chips are measured, but also the total ionizing dose effects experiments are finished using a Co-60 gamma radiation source. The experimental results show that, the TID(total ionizing dose effect) tolerance of SRAM chips is larger than 300 krad (Si) in which the electrical functions of SRAM are correct, but with the increase of TID rate, the static and dynamic current of SRAM increase seriously, and the write and read time increase slowly. Furthermore, it is verified by our research that, CMOS transistor layout design with ring-gate and P-type guard ring can enhance the TID tolerance of SRAM greatly.