Abstract
A process for fabricating submicron Josephson junctions suitable for integration in small- and medium-scale integrated circuits is described. This junction process utilizes a double-layer SiO/sub 2/ lift-off process in a cross-type geometry to define Josephson junctions. A photoresist strip with an arbitrary length and a fixed width defines the length of the junction. Its width is defined simultaneously with the metallization strip that crosses the first strip. The double-layer SiO/sub 2/ insures a pinhole-free oxide and yields excellent insulating properties suitable for medium-scale circuit applications. This process is used to fabricate Nb/AlO/sub x//Nb and NbN/MgO/NbN tunnel junctions as small as 0.5 mu m/sup 2/ with figures of merit (V/sub m/) larger than 30 mV. The repeatability of this process and its utility in high-current-density Josephson junction circuits are discussed.
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